- DSP log - http://www.dsplog.com -

GATE-2012 ECE Q13 (circuits)

Posted By Krishna Sankar On January 22, 2013 @ 7:07 am In GATE | 4 Comments

Question 13 on analog electronics from GATE (Graduate Aptitude Test in Engineering) 2012 Electronics and Communication Engineering paper.

## Solution

The first half of the circuit is a negative clamper circuit and the second half is a peak detector circuit as shown in the figure below.

(Discussed in Section 3.8 of MicroElectronic Circuits Sedra/Smith (from Amazon.com [1], from Flipkart.com [2]) or in  Chapter 6.17 of Millman’s Electronic Devices and Circuits (from Amazon.com [3]from Flipkart.com [4])

The negative clamper circuit works as follows :

The diode D1 will be initially conducting till the voltage across the capacitor C1 is charged to the peak voltage of 1 volts. In the following cyclesDuring the first half of the +ve cycle, the diode D1 will be ON and the capacitor is charged to peak voltage. The diode D1 will remain OFF during the further cycles and the voltage ${V(t)}$ is given by,

${V(t)=-1+\cos(\omega t)}$

## .

The second half of the circuit i.e the peak detector circuit, provides a negative voltage of -2 volts at the output of capacitor C2. Anyhow, given that we are only interested in the output of the negative clamper, the  voltage ${V(t)}$ is

${V(t)=-1+\cos(\omega t)}$

Based on the above, the right choice is (A) 1

## References

[1] GATE Examination Question Papers [Previous Years] from Indian Institute of Technology, Madras http://gate.iitm.ac.in/gateqps/2012/ec.pdf [5]

[3] Millman’s Electronic Devices and Circuits ( Buy from Amazon.com [3]Buy from Flipkart.com [4])

URL to article: http://www.dsplog.com/2013/01/22/gate-2012-ece-q13-circuits/

URLs in this post:

[5] http://gate.iitm.ac.in/gateqps/2012/ec.pdf: http://gate.iitm.ac.in/gateqps/2012/ec.pdf