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Digital implementation of RC low pass filter

Posted By Krishna Sankar On December 2, 2007 @ 4:39 am In Filter | 4 Comments

Thanks to the nice article from Xilinx TechXclusives [XLNX-TECH [1]], let us try to understand the probable digital implementation of resistor-capacitor based low pass filter. Consider a simple RC filter shown in the figure below. Assuming that there is no load across the capacitor, the capacitor charges and discharges through the resistor path.

RC low pass filter

Figure: RC low pass filter

is the voltage at the input of resistor and

is the voltage at the output.

From capacitor theory, the charge in the capacitor is , where

is the capacitance

is the voltage and

is the constant current flowing for short duration of time .

With the input voltage is greater than output voltage , resulting in current flowing through the resistor , where


When this current flows into the capacitor for a short time , the capacitor will charge and the voltage across the capacitor increases to

, where

is the new value of output voltage.

Digital Implementation

The above equation seems to be convenient for digital implementation as shown in the equation below:



is ,

is and

is .

The transfer function of the above equation is


Simulation model

Script for plotting the frequency and step response of a digital RC low pass filter.

Click here [2] to download.

Frequency response of a digital RC low pass filter

Figure: Frequency response of the digital implementation of RC low pass filter

Step response of a digital RC low pass filter

Figure: Step response of the digital implementation of RC low pass filter


1. As expected, lower the value of k, tighter is the frequency response and slower is the settling time. This is in synch with analog RC implementation, where a higher value of R and C suggests that the capacitor takes more time to charge/discharge (Note that k is inversely proportional to RC).

2. To facilitate simpler digital implementations not involving multipliers, the value of k can be chosen to be a power of 2.


[XLNX-TECH [1]] Xilinx TechXclusives: Digitally Removing a DC Offset (or “DSP Without Math?”), By Ken Chapman Senior Staff Engineer, Applications Specialist, Xilinx UK [1].

Hope this helps.


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[1] XLNX-TECH: http://www.xilinx.com/support/documentation/white_papers/wp279.pdf

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